Um cripto-processador reconfiguravel baseado em algoritmos de curvas elipticas e AES

AUTOR(ES)
DATA DE PUBLICAÇÃO

2004

RESUMO

Information Security is a key factor for de development ofmodern society. Every day, massive amounts of data flow through high speed networks without proper cryptographic security support. Cryptography services belong to the computational infTastructure and as such they are migrating into computer s hardware. In this context, the design of a parameterized crypto-processor that uses reconfigurable technology contributes to the development of such technology in the country. This dissertation presents cases studies on the construction of such crypto-processor, along with de analysis of many mechanisms for cryptographic devices. By using VHDL for both implementation and testing, the AES - FIPS 197 and the ECC - IEEE 1363 algorithms were implemented yielding high performance cryptographic accelerators. In addition, efficiency analysis of hash functions as SHA-! and others from its family were conducted for the resulting reconfigurable hardware. The logical and electrical interfaces received some attention too. In the first case, a brief study of cryptographic token interfaces, based on PKCS# 11, was done and a simplified compatible implementation was constructed. For the electrical interface many alternatives were analyzed and the PCI PCI-SIG r.2.! was chosen.

ASSUNTO(S)

criptografia arquitetura de computador

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