Vhdl Code
Mostrando 1-5 de 5 artigos, teses e dissertações.
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1. Uma ferramenta para execução de algoritmos utilizando o modelo a fluxo de dados dinâmico em hardware reconfigurável para a arquitetura ChipCflow: módulo de conversão C em grafo a fluxo de dados / A tool for algorithms implementation using the dynamic data flow model in reconfigurable hardware for the ChipCflow architecture - C conversion to data flow graph module
ChipCflow is a tool for algorithms execution using a data dynamic flow in reconfigurable hardware. The main purpose of the work is to use the data flow architecture model, associated to the concept of reconfigurable architectures, to speed up C written applications. The program acceleration happens in the most intensive processing parts (example: loops), thr
Publicado em: 2009
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2. MI-SBTVD: a proposal for the Brazilian digital television system SBTVD
The objective of this paper is to present a general overview of the Innovative Modulation System Project -MI-SBTVD - developed for the Brazilian Digital TV System. The MI-SBTVD Project includes an LDPC high performance error correcting code, an advanced transmit spatial diversity and an efficient multi-carrier modulation scheme. The building blocks of the sy
Journal of the Brazilian Computer Society. Publicado em: 2007-03
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3. Virtual prototype of the DTC strategy applied to induction motors using VHDL code / Protótipo virtual da estratégia DTC aplicada a motores de indução usando linguagem VHDL
This work presents a simulation of induction motor speed control using the technique of direct torque control (DTC), performed in a reprogrammable device type FPGA. The simulation is performed using two programs: MATLAB/Simulink and ModelSim, where these two programs work in a co-simulation mode, provide by Link for ModelSim toolbox from Simulink. While the
Publicado em: 2006
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4. SimRP - simulador de redes de petri flexível com geração de código VHDL
The objective of this dissertation is to implement a description and simulation CAD tool for Petri Nets (PNs) based on open source, called SimRP. This CAD tool will be able to describe and simulate several PNs namely Ordinary, Temporal, Temporized and Interpreted types. Besides this, SimRP provides an option to generate VHDL code (a hardware description lang
Publicado em: 2006
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5. Compressão do programas usando arvores de expressão
A redução no tamanho dos programas tem sido um fator importante no projeto de sistemas embarcados modernos voltados à produção em larga escala. Este problema tem direcionado grandes esforços em projetos de processadores que se utilizam de um conjunto de instruções com formato de tamanho reduzido (ex. ARM Thumb e MIPS16) ou que sejam capazes de execut
Publicado em: 2000